C-field driver - again, again

I keep pondering how to create a C-field driver controllable by computer, and I keep comming up short.

Doing the classic DAC+driver kind of thing keeps running into limitations and noise processes which exeed the allowance, and I’ve finally given up on it: It’s just not realistic.

Interestingly, where it can be quite hard to get a 16 bit DAC to behave, it’s almost trivial to get a 24 bit ADC these days, thanks to sigma-delta technology.

Instead of forcing the c-current with a DAC of great precision, that opens the door putting the precision requirement on an ADC and the current sense resistor, and use a µC to close the loop to a less than ideal DAC.

Here’s a strange idea I’ve been pondering for some years in context of OCXO EFC voltage generation:


The interesting part of the idea is to use a integrator as DAC and control the voltage using bi-polar pulses from the µC.

The idea is that the µC will emit such double pulses at a fixed rate, for instance 10 {kHz}. that makes it easy to filter out the noise it injects.

The basic sequence for each pulse is:

Set DOUT pin high
Take pin out of tri-state (Hi-Z) mode
Wait T(high)
Set DOUT pin low
Wait T(low)
Set pin back into tri-state (Hi-Z) mode

If everything is ideal, the integrator will see no net charge injection if the high and the low pulses are the same duration, and we can “step” the integrator up or down by extending the width of the high or low pulse.

In an non-ideal world, all sorts of things are wrong, but the µC can compensate most of it, using a simple PID loop.

An unbalance in the bipolar pulses, a leakage in the integrator or offset in the driver will all require a continuous charge injection into the integrator.

That means that some fraction of the bipolar pulses should have different T(high) and T(low) width to keep the voltage constant, but an integrator term with a dithering stage will do that.

More troublesome is the tempco of the integrating capacitor.

It may surprise you lowest available tempco capacitors, N0P/C0G ceramics come in at 30 {ppm/K} and max out at 470 {nF} sizes.

The good news is that there is no power-dissipation in the capacitor, so it can be thermally insulated without limit, to slow down the temperature changes to a point where the µC can compensate it.

The only analog parts which must be really precise and stable are the voltage reference and the ADC.

I’m looking at LTC2400 for the ADC (because SO-8 is just about solderable by hand) and still have my eye on a LM399 for the voltage reference.

If you are wondering what the down-side is, it’s bandwidth and slew-rate.

This is not a fast DAC by any measure, but since it’s task is to wander around a particular voltage, it does not have to be fast.

If the input resistor to the integrator is too large, in order to get high “resolution”, it may take quite some time to charge the integrator to a mid-range value at startup.

One way to work around that is to have two input resistors, a large one for operation, and a smaller one used only during startup to get into the right ball-park.

The inspiration comes from an article about the HP3458A A/D converter in Hewlett Packard Journal, where they use such bipolar pulses to avoid integrator run-up.